This is code is for an simple asynchronous wrapping n-bit adder. By changing the value of *n* you can make it a 2, 4, … bit adder where *n* = <number of bits> – 1. *f* is the output register that will have the current value of the counter, *cOut* is the carry output. *a* & *b* are the number inputs and *cIn* is the carry input. Both the number outputs and inputs are set by the value of *n* so you can add two n-bit numbers and a carry bit then get an n-bit number plus carry bit out. Continue reading

# Verilog: n-Bit Adder

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